1. Field of the Invention
This invention relates to a wafer processing method that offers concurrent processing of a plural number of wafer lots in different wafer tanks for reducing the total processing time and increasing through-put.
2. Description of the Prior Art
Conventional methods for processing semi-conductor wafers use sequencing by lots. In other words, one lot of wafers has to complete a processing step in one tank before another lot of wafers may be processed in another tank. FIG. 1 shows such an example. There are three lots 1, 2 and 3 of wafers that are stored and assigned respectively at three different stages 10, 20 and 30. There are four different tanks 11, 1213 and 14. Each tank may perform a different wafer process such as depositing photo resist, etching processing, etc. There is a passage 15 for communicating the stages with each tank. For instance, lot 1 may be assigned a process sequence number 21 and be processed in the tank 11, lot 2 be assigned a sequence number 22 for processing in the tank 12, and lot 3 be assigned a sequence number 23 to be processed in the tank 13.
The problem with the conventional methods is that all the lots to be processed must be sequenced one after another. For example, lot 2 cannot be transported to the tank 12 until after the lot 1 at the tank 11 has completed its processing thereof. Lot 3 cannot be moved to the tank 13 until after lot 1 and lot 2 have completed processing in tanks 11 and 12. Therefore, the queue time is long and adversely affects total through-put.
FIG. 2 further explains the process flow of a conventional sequenced wafer lot processing method. Step 411 is to load different lots of wafers to different stages. Step 412 selects a required processing recipe (such as depositing photoresistance or etching the wafer) for each lot and starting execution of the processing. Step 413 is to set the processing priority for each lot, including assigning the starting sequence number, position number and tank number, etc. Step 414 involves scanning the wafer in a wafer lot to read the lot information. Step 415 involves loading the lot information into a computer memory buffer. In step 416, the wafer from a fixed lot to be processed is loaded into a specific tank. Step 417 performs one wafer processing such as depositing photoresistance on the wafer. Step 418 involves moving the wafer to its original location (original lot). At step 419, there are two possible routes. If this is not the last wafer in the lot, then processing returns to the step 415 for processing the next wafer.
If it is the last wafer in the lot, then step 420 further checks if it is the last lot. If the answer is negative, processing returns again to step 415 for another cycle of processing through the step 421. If the answer is positive, then processing ends at step 422.
The conventional processing method set forth above is basically a sequential operation. Each lot will be assigned a sequence number (step 413). Once assigned, it will be waiting in a queue until a preceding lot has completed processing even if it takes a different processing step at a different tank.